startup_stm32f10x_hd_vl.s 12 KB

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  1. /**
  2. ******************************************************************************
  3. * @file startup_stm32f10x_hd_vl.s
  4. * @author MCD Application Team
  5. * @version V3.5.0
  6. * @date 11-March-2011
  7. * @brief STM32F10x High Density Value Line Devices vector table for Atollic
  8. * toolchain.
  9. * This module performs:
  10. * - Set the initial SP
  11. * - Set the initial PC == Reset_Handler,
  12. * - Set the vector table entries with the exceptions ISR address
  13. * - Configure the clock system
  14. * - Configure external SRAM mounted on STM32100E-EVAL board
  15. * to be used as data memory (optional, to be enabled by user)
  16. * - Branches to main in the C library (which eventually
  17. * calls main()).
  18. * After Reset the Cortex-M3 processor is in Thread mode,
  19. * priority is Privileged, and the Stack is set to Main.
  20. ******************************************************************************
  21. * @attention
  22. *
  23. * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
  24. * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
  25. * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
  26. * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
  27. * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
  28. * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
  29. *
  30. * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
  31. ******************************************************************************
  32. */
  33. .syntax unified
  34. .cpu cortex-m3
  35. .fpu softvfp
  36. .thumb
  37. .global g_pfnVectors
  38. .global Default_Handler
  39. /* start address for the initialization values of the .data section.
  40. defined in linker script */
  41. .word _sidata
  42. /* start address for the .data section. defined in linker script */
  43. .word _sdata
  44. /* end address for the .data section. defined in linker script */
  45. .word _edata
  46. /* start address for the .bss section. defined in linker script */
  47. .word _sbss
  48. /* end address for the .bss section. defined in linker script */
  49. .word _ebss
  50. .equ BootRAM, 0xF108F85F
  51. /**
  52. * @brief This is the code that gets called when the processor first
  53. * starts execution following a reset event. Only the absolutely
  54. * necessary set is performed, after which the application
  55. * supplied main() routine is called.
  56. * @param None
  57. * @retval : None
  58. */
  59. .section .text.Reset_Handler
  60. .weak Reset_Handler
  61. .type Reset_Handler, %function
  62. Reset_Handler:
  63. /* Copy the data segment initializers from flash to SRAM */
  64. movs r1, #0
  65. b LoopCopyDataInit
  66. CopyDataInit:
  67. ldr r3, =_sidata
  68. ldr r3, [r3, r1]
  69. str r3, [r0, r1]
  70. adds r1, r1, #4
  71. LoopCopyDataInit:
  72. ldr r0, =_sdata
  73. ldr r3, =_edata
  74. adds r2, r0, r1
  75. cmp r2, r3
  76. bcc CopyDataInit
  77. ldr r2, =_sbss
  78. b LoopFillZerobss
  79. /* Zero fill the bss segment. */
  80. FillZerobss:
  81. movs r3, #0
  82. str r3, [r2], #4
  83. LoopFillZerobss:
  84. ldr r3, = _ebss
  85. cmp r2, r3
  86. bcc FillZerobss
  87. /* Call the clock system intitialization function.*/
  88. bl SystemInit
  89. /* Call static constructors */
  90. bl __libc_init_array
  91. /* Call the application's entry point.*/
  92. bl main
  93. bx lr
  94. .size Reset_Handler, .-Reset_Handler
  95. /**
  96. * @brief This is the code that gets called when the processor receives an
  97. * unexpected interrupt. This simply enters an infinite loop, preserving
  98. * the system state for examination by a debugger.
  99. *
  100. * @param None
  101. * @retval : None
  102. */
  103. .section .text.Default_Handler,"ax",%progbits
  104. Default_Handler:
  105. Infinite_Loop:
  106. b Infinite_Loop
  107. .size Default_Handler, .-Default_Handler
  108. /******************************************************************************
  109. *
  110. * The minimal vector table for a Cortex M3. Note that the proper constructs
  111. * must be placed on this to ensure that it ends up at physical address
  112. * 0x0000.0000.
  113. *
  114. ******************************************************************************/
  115. .section .isr_vector,"a",%progbits
  116. .type g_pfnVectors, %object
  117. .size g_pfnVectors, .-g_pfnVectors
  118. g_pfnVectors:
  119. .word _estack
  120. .word Reset_Handler
  121. .word NMI_Handler
  122. .word HardFault_Handler
  123. .word MemManage_Handler
  124. .word BusFault_Handler
  125. .word UsageFault_Handler
  126. .word 0
  127. .word 0
  128. .word 0
  129. .word 0
  130. .word SVC_Handler
  131. .word DebugMon_Handler
  132. .word 0
  133. .word PendSV_Handler
  134. .word SysTick_Handler
  135. .word WWDG_IRQHandler
  136. .word PVD_IRQHandler
  137. .word TAMPER_IRQHandler
  138. .word RTC_IRQHandler
  139. .word FLASH_IRQHandler
  140. .word RCC_IRQHandler
  141. .word EXTI0_IRQHandler
  142. .word EXTI1_IRQHandler
  143. .word EXTI2_IRQHandler
  144. .word EXTI3_IRQHandler
  145. .word EXTI4_IRQHandler
  146. .word DMA1_Channel1_IRQHandler
  147. .word DMA1_Channel2_IRQHandler
  148. .word DMA1_Channel3_IRQHandler
  149. .word DMA1_Channel4_IRQHandler
  150. .word DMA1_Channel5_IRQHandler
  151. .word DMA1_Channel6_IRQHandler
  152. .word DMA1_Channel7_IRQHandler
  153. .word ADC1_IRQHandler
  154. .word 0
  155. .word 0
  156. .word 0
  157. .word 0
  158. .word EXTI9_5_IRQHandler
  159. .word TIM1_BRK_TIM15_IRQHandler
  160. .word TIM1_UP_TIM16_IRQHandler
  161. .word TIM1_TRG_COM_TIM17_IRQHandler
  162. .word TIM1_CC_IRQHandler
  163. .word TIM2_IRQHandler
  164. .word TIM3_IRQHandler
  165. .word TIM4_IRQHandler
  166. .word I2C1_EV_IRQHandler
  167. .word I2C1_ER_IRQHandler
  168. .word I2C2_EV_IRQHandler
  169. .word I2C2_ER_IRQHandler
  170. .word SPI1_IRQHandler
  171. .word SPI2_IRQHandler
  172. .word USART1_IRQHandler
  173. .word USART2_IRQHandler
  174. .word USART3_IRQHandler
  175. .word EXTI15_10_IRQHandler
  176. .word RTCAlarm_IRQHandler
  177. .word CEC_IRQHandler
  178. .word TIM12_IRQHandler
  179. .word TIM13_IRQHandler
  180. .word TIM14_IRQHandler
  181. .word 0
  182. .word 0
  183. .word 0
  184. .word 0
  185. .word TIM5_IRQHandler
  186. .word SPI3_IRQHandler
  187. .word UART4_IRQHandler
  188. .word UART5_IRQHandler
  189. .word TIM6_DAC_IRQHandler
  190. .word TIM7_IRQHandler
  191. .word DMA2_Channel1_IRQHandler
  192. .word DMA2_Channel2_IRQHandler
  193. .word DMA2_Channel3_IRQHandler
  194. .word DMA2_Channel4_5_IRQHandler
  195. .word DMA2_Channel5_IRQHandler
  196. .word 0
  197. .word 0
  198. .word 0
  199. .word 0
  200. .word 0
  201. .word 0
  202. .word 0
  203. .word 0
  204. .word 0
  205. .word 0
  206. .word 0
  207. .word 0
  208. .word 0
  209. .word 0
  210. .word 0
  211. .word 0
  212. .word 0
  213. .word 0
  214. .word 0
  215. .word 0
  216. .word 0
  217. .word 0
  218. .word 0
  219. .word 0
  220. .word 0
  221. .word 0
  222. .word 0
  223. .word 0
  224. .word 0
  225. .word 0
  226. .word 0
  227. .word 0
  228. .word 0
  229. .word 0
  230. .word 0
  231. .word 0
  232. .word 0
  233. .word 0
  234. .word 0
  235. .word 0
  236. .word 0
  237. .word 0
  238. .word 0
  239. .word BootRAM /* @0x1E0. This is for boot in RAM mode for
  240. STM32F10x High Density Value line devices. */
  241. /*******************************************************************************
  242. *
  243. * Provide weak aliases for each Exception handler to the Default_Handler.
  244. * As they are weak aliases, any function with the same name will override
  245. * this definition.
  246. *
  247. *******************************************************************************/
  248. .weak NMI_Handler
  249. .thumb_set NMI_Handler,Default_Handler
  250. .weak HardFault_Handler
  251. .thumb_set HardFault_Handler,Default_Handler
  252. .weak MemManage_Handler
  253. .thumb_set MemManage_Handler,Default_Handler
  254. .weak BusFault_Handler
  255. .thumb_set BusFault_Handler,Default_Handler
  256. .weak UsageFault_Handler
  257. .thumb_set UsageFault_Handler,Default_Handler
  258. .weak SVC_Handler
  259. .thumb_set SVC_Handler,Default_Handler
  260. .weak DebugMon_Handler
  261. .thumb_set DebugMon_Handler,Default_Handler
  262. .weak PendSV_Handler
  263. .thumb_set PendSV_Handler,Default_Handler
  264. .weak SysTick_Handler
  265. .thumb_set SysTick_Handler,Default_Handler
  266. .weak WWDG_IRQHandler
  267. .thumb_set WWDG_IRQHandler,Default_Handler
  268. .weak PVD_IRQHandler
  269. .thumb_set PVD_IRQHandler,Default_Handler
  270. .weak TAMPER_IRQHandler
  271. .thumb_set TAMPER_IRQHandler,Default_Handler
  272. .weak RTC_IRQHandler
  273. .thumb_set RTC_IRQHandler,Default_Handler
  274. .weak FLASH_IRQHandler
  275. .thumb_set FLASH_IRQHandler,Default_Handler
  276. .weak RCC_IRQHandler
  277. .thumb_set RCC_IRQHandler,Default_Handler
  278. .weak EXTI0_IRQHandler
  279. .thumb_set EXTI0_IRQHandler,Default_Handler
  280. .weak EXTI1_IRQHandler
  281. .thumb_set EXTI1_IRQHandler,Default_Handler
  282. .weak EXTI2_IRQHandler
  283. .thumb_set EXTI2_IRQHandler,Default_Handler
  284. .weak EXTI3_IRQHandler
  285. .thumb_set EXTI3_IRQHandler,Default_Handler
  286. .weak EXTI4_IRQHandler
  287. .thumb_set EXTI4_IRQHandler,Default_Handler
  288. .weak DMA1_Channel1_IRQHandler
  289. .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
  290. .weak DMA1_Channel2_IRQHandler
  291. .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
  292. .weak DMA1_Channel3_IRQHandler
  293. .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
  294. .weak DMA1_Channel4_IRQHandler
  295. .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
  296. .weak DMA1_Channel5_IRQHandler
  297. .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
  298. .weak DMA1_Channel6_IRQHandler
  299. .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
  300. .weak DMA1_Channel7_IRQHandler
  301. .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
  302. .weak ADC1_IRQHandler
  303. .thumb_set ADC1_IRQHandler,Default_Handler
  304. .weak EXTI9_5_IRQHandler
  305. .thumb_set EXTI9_5_IRQHandler,Default_Handler
  306. .weak TIM1_BRK_TIM15_IRQHandler
  307. .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
  308. .weak TIM1_UP_TIM16_IRQHandler
  309. .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
  310. .weak TIM1_TRG_COM_TIM17_IRQHandler
  311. .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
  312. .weak TIM1_CC_IRQHandler
  313. .thumb_set TIM1_CC_IRQHandler,Default_Handler
  314. .weak TIM2_IRQHandler
  315. .thumb_set TIM2_IRQHandler,Default_Handler
  316. .weak TIM3_IRQHandler
  317. .thumb_set TIM3_IRQHandler,Default_Handler
  318. .weak TIM4_IRQHandler
  319. .thumb_set TIM4_IRQHandler,Default_Handler
  320. .weak I2C1_EV_IRQHandler
  321. .thumb_set I2C1_EV_IRQHandler,Default_Handler
  322. .weak I2C1_ER_IRQHandler
  323. .thumb_set I2C1_ER_IRQHandler,Default_Handler
  324. .weak I2C2_EV_IRQHandler
  325. .thumb_set I2C2_EV_IRQHandler,Default_Handler
  326. .weak I2C2_ER_IRQHandler
  327. .thumb_set I2C2_ER_IRQHandler,Default_Handler
  328. .weak SPI1_IRQHandler
  329. .thumb_set SPI1_IRQHandler,Default_Handler
  330. .weak SPI2_IRQHandler
  331. .thumb_set SPI2_IRQHandler,Default_Handler
  332. .weak USART1_IRQHandler
  333. .thumb_set USART1_IRQHandler,Default_Handler
  334. .weak USART2_IRQHandler
  335. .thumb_set USART2_IRQHandler,Default_Handler
  336. .weak USART3_IRQHandler
  337. .thumb_set USART3_IRQHandler,Default_Handler
  338. .weak EXTI15_10_IRQHandler
  339. .thumb_set EXTI15_10_IRQHandler,Default_Handler
  340. .weak RTCAlarm_IRQHandler
  341. .thumb_set RTCAlarm_IRQHandler,Default_Handler
  342. .weak CEC_IRQHandler
  343. .thumb_set CEC_IRQHandler,Default_Handler
  344. .weak TIM12_IRQHandler
  345. .thumb_set TIM12_IRQHandler,Default_Handler
  346. .weak TIM13_IRQHandler
  347. .thumb_set TIM13_IRQHandler,Default_Handler
  348. .weak TIM14_IRQHandler
  349. .thumb_set TIM14_IRQHandler,Default_Handler
  350. .weak TIM5_IRQHandler
  351. .thumb_set TIM5_IRQHandler,Default_Handler
  352. .weak SPI3_IRQHandler
  353. .thumb_set SPI3_IRQHandler,Default_Handler
  354. .weak UART4_IRQHandler
  355. .thumb_set UART4_IRQHandler,Default_Handler
  356. .weak UART5_IRQHandler
  357. .thumb_set UART5_IRQHandler,Default_Handler
  358. .weak TIM6_DAC_IRQHandler
  359. .thumb_set TIM6_DAC_IRQHandler,Default_Handler
  360. .weak TIM7_IRQHandler
  361. .thumb_set TIM7_IRQHandler,Default_Handler
  362. .weak DMA2_Channel1_IRQHandler
  363. .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
  364. .weak DMA2_Channel2_IRQHandler
  365. .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
  366. .weak DMA2_Channel3_IRQHandler
  367. .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
  368. .weak DMA2_Channel4_5_IRQHandler
  369. .thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler
  370. .weak DMA2_Channel5_IRQHandler
  371. .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
  372. /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/