hw_spi.h 16 KB

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  1. /**
  2. * \file hw_spi.h
  3. *
  4. * \brief SPI register definitions
  5. */
  6. /*
  7. * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
  8. */
  9. /*
  10. * Redistribution and use in source and binary forms, with or without
  11. * modification, are permitted provided that the following conditions
  12. * are met:
  13. *
  14. * Redistributions of source code must retain the above copyright
  15. * notice, this list of conditions and the following disclaimer.
  16. *
  17. * Redistributions in binary form must reproduce the above copyright
  18. * notice, this list of conditions and the following disclaimer in the
  19. * documentation and/or other materials provided with the
  20. * distribution.
  21. *
  22. * Neither the name of Texas Instruments Incorporated nor the names of
  23. * its contributors may be used to endorse or promote products derived
  24. * from this software without specific prior written permission.
  25. *
  26. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  27. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  28. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  29. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  30. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  31. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  32. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  33. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  34. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  35. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  36. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  37. *
  38. */
  39. #ifndef _HW_SPI_H_
  40. #define _HW_SPI_H_
  41. #ifdef __cplusplus
  42. extern "C" {
  43. #endif
  44. #define SPI_SPIGCR0 (0x0)
  45. #define SPI_SPIGCR1 (0x4)
  46. #define SPI_SPIINT0 (0x8)
  47. #define SPI_SPILVL (0xC)
  48. #define SPI_SPIFLG (0x10)
  49. #define SPI_SPIPC(n) (0x14 + (4 * n))
  50. #define SPI_SPIDAT0 (0x38)
  51. #define SPI_SPIDAT1 (0x3C)
  52. #define SPI_SPIBUF (0x40)
  53. #define SPI_SPIEMU (0x44)
  54. #define SPI_SPIDELAY (0x48)
  55. #define SPI_SPIDEF (0x4C)
  56. #define SPI_SPIFMT(n) (0x50 + (n * 4))
  57. #define SPI_INTVEC1 (0x64)
  58. /**************************************************************************\
  59. * Field Definition Macros
  60. \**************************************************************************/
  61. /* SPIGCR0 */
  62. #define SPI_SPIGCR0_RESET (0x00000001u)
  63. #define SPI_SPIGCR0_RESET_SHIFT (0x00000000u)
  64. /* SPIGCR1 */
  65. #define SPI_SPIGCR1_ENABLE (0x01000000)
  66. #define SPI_SPIGCR1_ENABLE_SHIFT (0x00000018u)
  67. #define SPI_SPIGCR1_LOOPBACK (0x00010000u)
  68. #define SPI_SPIGCR1_LOOPBACK_SHIFT (0x00000010u)
  69. #define SPI_SPIGCR1_POWERDOWN (0x00000100u)
  70. #define SPI_SPIGCR1_POWERDOWN_SHIFT (0x00000008u)
  71. #define SPI_SPIGCR1_CLKMOD (0x00000002u)
  72. #define SPI_SPIGCR1_CLKMOD_SHIFT (0x00000001u)
  73. #define SPI_SPIGCR1_MASTER (0x00000001u)
  74. #define SPI_SPIGCR1_MASTER_SHIFT (0x00000000u)
  75. /* SPIINT0 */
  76. #define SPI_SPIINT0_ENABLEHIGHZ (0x01000000u)
  77. #define SPI_SPIINT0_ENABLEHIGHZ_SHIFT (0x00000018u)
  78. #define SPI_SPIINT0_DMAREQEN (0x00010000u)
  79. #define SPI_SPIINT0_DMAREQEN_SHIFT (0x00000010u)
  80. #define SPI_SPIINT0_TXINTENA (0x00000200u)
  81. #define SPI_SPIINT0_TXINTENA_SHIFT (0x00000009u)
  82. #define SPI_SPIINT0_RXINTENA (0x00000100u)
  83. #define SPI_SPIINT0_RXINTENA_SHIFT (0x00000008u)
  84. #define SPI_SPIINT0_OVRNINTENA (0x00000040u)
  85. #define SPI_SPIINT0_OVRNINTENA_SHIFT (0x00000006u)
  86. #define SPI_SPIINT0_BITERRENA (0x00000010u)
  87. #define SPI_SPIINT0_BITERRENA_SHIFT (0x00000004u)
  88. #define SPI_SPIINT0_DESYNCENA (0x00000008u)
  89. #define SPI_SPIINT0_DESYNCENA_SHIFT (0x00000003u)
  90. #define SPI_SPIINT0_PARERRENA (0x00000004u)
  91. #define SPI_SPIINT0_PARERRENA_SHIFT (0x00000002u)
  92. #define SPI_SPIINT0_TIMEOUTENA (0x00000002u)
  93. #define SPI_SPIINT0_TIMEOUTENA_SHIFT (0x00000001u)
  94. #define SPI_SPIINT0_DLENERRENA (0x00000001u)
  95. #define SPI_SPIINT0_DLENERRENA_SHIFT (0x00000000u)
  96. /* SPILVL */
  97. #define SPI_SPILVL_TXINTLVL (0x00000200u)
  98. #define SPI_SPILVL_TXINTLVL_SHIFT (0x00000009u)
  99. #define SPI_SPILVL_RXINTLVL (0x00000100u)
  100. #define SPI_SPILVL_RXINTLVL_SHIFT (0x00000008u)
  101. #define SPI_SPILVL_OVRNINTLVL (0x00000040u)
  102. #define SPI_SPILVL_OVRNINTLVL_SHIFT (0x00000006u)
  103. #define SPI_SPILVL_BITERRLVL (0x00000010u)
  104. #define SPI_SPILVL_BITERRLVL_SHIFT (0x00000004u)
  105. #define SPI_SPILVL_DESYNCLVL (0x00000008u)
  106. #define SPI_SPILVL_DESYNCLVL_SHIFT (0x00000003u)
  107. #define SPI_SPILVL_PARERRLVL (0x00000004u)
  108. #define SPI_SPILVL_PARERRLVL_SHIFT (0x00000002u)
  109. #define SPI_SPILVL_TIMEOUTLVL (0x00000002u)
  110. #define SPI_SPILVL_TIMEOUTLVL_SHIFT (0x00000001u)
  111. #define SPI_SPILVL_DLENERRLVL (0x00000001u)
  112. #define SPI_SPILVL_DLENERRLVL_SHIFT (0x00000000u)
  113. /* SPIFLG */
  114. #define SPI_SPIFLG_TXINTFLG (0x00000200u)
  115. #define SPI_SPIFLG_TXINTFLG_SHIFT (0x00000009u)
  116. #define SPI_SPIFLG_RXINTFLG (0x00000100u)
  117. #define SPI_SPIFLG_RXINTFLG_SHIFT (0x00000008u)
  118. #define SPI_SPIFLG_OVRNINTFLG (0x00000040u)
  119. #define SPI_SPIFLG_OVRNINTFLG_SHIFT (0x00000006u)
  120. #define SPI_SPIFLG_BITERRFLG (0x00000010u)
  121. #define SPI_SPIFLG_BITERRFLG_SHIFT (0x00000004u)
  122. #define SPI_SPIFLG_DESYNCFLG (0x00000008u)
  123. #define SPI_SPIFLG_DESYNCFLG_SHIFT (0x00000003u)
  124. #define SPI_SPIFLG_PARERRFLG (0x00000004u)
  125. #define SPI_SPIFLG_PARERRFLG_SHIFT (0x00000002u)
  126. #define SPI_SPIFLG_TIMEOUTFLG (0x00000002u)
  127. #define SPI_SPIFLG_TIMEOUTFLG_SHIFT (0x00000001u)
  128. #define SPI_SPIFLG_DLENERRFLG (0x00000001u)
  129. #define SPI_SPIFLG_DLENERRFLG_SHIFT (0x00000000u)
  130. /* SPIPC0 */
  131. #define SPI_SPIPC0_SOMIFUN (0x00000800u)
  132. #define SPI_SPIPC0_SOMIFUN_SHIFT (0x0000000Bu)
  133. #define SPI_SPIPC0_SIMOFUN (0x00000400u)
  134. #define SPI_SPIPC0_SIMOFUN_SHIFT (0x0000000Au)
  135. #define SPI_SPIPC0_CLKFUN (0x00000200u)
  136. #define SPI_SPIPC0_CLKFUN_SHIFT (0x00000009u)
  137. #define SPI_SPIPC0_ENAFUN (0x00000100u)
  138. #define SPI_SPIPC0_ENAFUN_SHIFT (0x00000008u)
  139. #define SPI_SPIPC0_SCS0FUN7 (0x00000080u)
  140. #define SPI_SPIPC0_SCS0FUN7_SHIFT (0x00000007u)
  141. #define SPI_SPIPC0_SCS0FUN6 (0x00000040u)
  142. #define SPI_SPIPC0_SCS0FUN6_SHIFT (0x00000006u)
  143. #define SPI_SPIPC0_SCS0FUN5 (0x00000020u)
  144. #define SPI_SPIPC0_SCS0FUN5_SHIFT (0x00000005u)
  145. #define SPI_SPIPC0_SCS0FUN4 (0x00000010u)
  146. #define SPI_SPIPC0_SCS0FUN4_SHIFT (0x00000004u)
  147. #define SPI_SPIPC0_SCS0FUN3 (0x00000008u)
  148. #define SPI_SPIPC0_SCS0FUN3_SHIFT (0x00000003u)
  149. #define SPI_SPIPC0_SCS0FUN2 (0x00000004u)
  150. #define SPI_SPIPC0_SCS0FUN2_SHIFT (0x00000002u)
  151. #define SPI_SPIPC0_SCS0FUN1 (0x00000002u)
  152. #define SPI_SPIPC0_SCS0FUN1_SHIFT (0x00000001u)
  153. #define SPI_SPIPC0_SCS0FUN0 (0x00000001u)
  154. #define SPI_SPIPC0_SCS0FUN0_SHIFT (0x00000000u)
  155. /* SPIPC1 */
  156. #define SPI_SPIPC1_SOMIDIR (0x00000800u)
  157. #define SPI_SPIPC1_SOMIDIR_SHIFT (0x0000000Bu)
  158. #define SPI_SPIPC1_SIMODIR (0x00000400u)
  159. #define SPI_SPIPC1_SIMODIR_SHIFT (0x0000000Au)
  160. #define SPI_SPIPC1_CLKDIR (0x00000200u)
  161. #define SPI_SPIPC1_CLKDIR_SHIFT (0x00000009u)
  162. #define SPI_SPIPC1_ENADIR (0x00000100u)
  163. #define SPI_SPIPC1_ENADIR_SHIFT (0x00000008u)
  164. #define SPI_SPIPC1_SCS0DIR7 (0x00000080u)
  165. #define SPI_SPIPC1_SCS0DIR7_SHIFT (0x00000007u)
  166. #define SPI_SPIPC1_SCS0DIR6 (0x00000040u)
  167. #define SPI_SPIPC1_SCS0DIR6_SHIFT (0x00000006u)
  168. #define SPI_SPIPC1_SCS0DIR5 (0x00000020u)
  169. #define SPI_SPIPC1_SCS0DIR5_SHIFT (0x00000005u)
  170. #define SPI_SPIPC1_SCS0DIR4 (0x00000010u)
  171. #define SPI_SPIPC1_SCS0DIR4_SHIFT (0x00000004u)
  172. #define SPI_SPIPC1_SCS0DIR3 (0x00000008u)
  173. #define SPI_SPIPC1_SCS0DIR3_SHIFT (0x00000003u)
  174. #define SPI_SPIPC1_SCS0DIR2 (0x00000004u)
  175. #define SPI_SPIPC1_SCS0DIR2_SHIFT (0x00000002u)
  176. #define SPI_SPIPC1_SCS0DIR1 (0x00000002u)
  177. #define SPI_SPIPC1_SCS0DIR1_SHIFT (0x00000001u)
  178. #define SPI_SPIPC1_SCS0DIR0 (0x00000001u)
  179. #define SPI_SPIPC1_SCS0DIR0_SHIFT (0x00000000u)
  180. /* SPIPC2 */
  181. #define SPI_SPIPC2_SOMIDIN (0x00000800u)
  182. #define SPI_SPIPC2_SOMIDIN_SHIFT (0x0000000Bu)
  183. #define SPI_SPIPC2_SIMODIN (0x00000400u)
  184. #define SPI_SPIPC2_SIMODIN_SHIFT (0x0000000Au)
  185. #define SPI_SPIPC2_CLKDIN (0x00000200u)
  186. #define SPI_SPIPC2_CLKDIN_SHIFT (0x00000009u)
  187. #define SPI_SPIPC2_ENADIN (0x00000100u)
  188. #define SPI_SPIPC2_ENADIN_SHIFT (0x00000008u)
  189. #define SPI_SPIPC2_SCS0DIN7 (0x00000080u)
  190. #define SPI_SPIPC2_SCS0DIN7_SHIFT (0x00000007u)
  191. #define SPI_SPIPC2_SCS0DIN6 (0x00000040u)
  192. #define SPI_SPIPC2_SCS0DIN6_SHIFT (0x00000006u)
  193. #define SPI_SPIPC2_SCS0DIN5 (0x00000020u)
  194. #define SPI_SPIPC2_SCS0DIN5_SHIFT (0x00000005u)
  195. #define SPI_SPIPC2_SCS0DIN4 (0x00000010u)
  196. #define SPI_SPIPC2_SCS0DIN4_SHIFT (0x00000004u)
  197. #define SPI_SPIPC2_SCS0DIN3 (0x00000008u)
  198. #define SPI_SPIPC2_SCS0DIN3_SHIFT (0x00000003u)
  199. #define SPI_SPIPC2_SCS0DIN2 (0x00000004u)
  200. #define SPI_SPIPC2_SCS0DIN2_SHIFT (0x00000002u)
  201. #define SPI_SPIPC2_SCS0DIN1 (0x00000002u)
  202. #define SPI_SPIPC2_SCS0DIN1_SHIFT (0x00000001u)
  203. #define SPI_SPIPC2_SCS0DIN0 (0x00000001u)
  204. #define SPI_SPIPC2_SCS0DIN0_SHIFT (0x00000000u)
  205. /* SPIPC3 */
  206. #define SPI_SPIPC3_SOMIDOUT (0x00000800u)
  207. #define SPI_SPIPC3_SOMIDOUT_SHIFT (0x0000000Bu)
  208. #define SPI_SPIPC3_SIMODOUT (0x00000400u)
  209. #define SPI_SPIPC3_SIMODOUT_SHIFT (0x0000000Au)
  210. #define SPI_SPIPC3_CLKDOUT (0x00000200u)
  211. #define SPI_SPIPC3_CLKDOUT_SHIFT (0x00000009u)
  212. #define SPI_SPIPC3_ENADOUT (0x00000100u)
  213. #define SPI_SPIPC3_ENADOUT_SHIFT (0x00000008u)
  214. #define SPI_SPIPC3_SCS0DOUT7 (0x00000080u)
  215. #define SPI_SPIPC3_SCS0DOUT7_SHIFT (0x00000007u)
  216. #define SPI_SPIPC3_SCS0DOUT6 (0x00000040u)
  217. #define SPI_SPIPC3_SCS0DOUT6_SHIFT (0x00000006u)
  218. #define SPI_SPIPC3_SCS0DOUT5 (0x00000020u)
  219. #define SPI_SPIPC3_SCS0DOUT5_SHIFT (0x00000005u)
  220. #define SPI_SPIPC3_SCS0DOUT4 (0x00000010u)
  221. #define SPI_SPIPC3_SCS0DOUT4_SHIFT (0x00000004u)
  222. #define SPI_SPIPC3_SCS0DOUT3 (0x00000008u)
  223. #define SPI_SPIPC3_SCS0DOUT3_SHIFT (0x00000003u)
  224. #define SPI_SPIPC3_SCS0DOUT2 (0x00000004u)
  225. #define SPI_SPIPC3_SCS0DOUT2_SHIFT (0x00000002u)
  226. #define SPI_SPIPC3_SCS0DOUT1 (0x00000002u)
  227. #define SPI_SPIPC3_SCS0DOUT1_SHIFT (0x00000001u)
  228. #define SPI_SPIPC3_SCS0DOUT0 (0x00000001u)
  229. #define SPI_SPIPC3_SCS0DOUT0_SHIFT (0x00000000u)
  230. /* SPIPC4 */
  231. #define SPI_SPIPC4_SOMISET (0x00000800u)
  232. #define SPI_SPIPC4_SOMISET_SHIFT (0x0000000Bu)
  233. #define SPI_SPIPC4_SIMOSET (0x00000400u)
  234. #define SPI_SPIPC4_SIMOSET_SHIFT (0x0000000Au)
  235. #define SPI_SPIPC4_CLKSET (0x00000200u)
  236. #define SPI_SPIPC4_CLKSET_SHIFT (0x00000009u)
  237. #define SPI_SPIPC4_ENASET (0x00000100u)
  238. #define SPI_SPIPC4_ENASET_SHIFT (0x00000008u)
  239. #define SPI_SPIPC4_SCS0SET7 (0x00000080u)
  240. #define SPI_SPIPC4_SCS0SET7_SHIFT (0x00000007u)
  241. #define SPI_SPIPC4_SCS0SET6 (0x00000040u)
  242. #define SPI_SPIPC4_SCS0SET6_SHIFT (0x00000006u)
  243. #define SPI_SPIPC4_SCS0SET5 (0x00000020u)
  244. #define SPI_SPIPC4_SCS0SET5_SHIFT (0x00000005u)
  245. #define SPI_SPIPC4_SCS0SET4 (0x00000010u)
  246. #define SPI_SPIPC4_SCS0SET4_SHIFT (0x00000004u)
  247. #define SPI_SPIPC4_SCS0SET3 (0x00000008u)
  248. #define SPI_SPIPC4_SCS0SET3_SHIFT (0x00000003u)
  249. #define SPI_SPIPC4_SCS0SET2 (0x00000004u)
  250. #define SPI_SPIPC4_SCS0SET2_SHIFT (0x00000002u)
  251. #define SPI_SPIPC4_SCS0SET1 (0x00000002u)
  252. #define SPI_SPIPC4_SCS0SET1_SHIFT (0x00000001u)
  253. #define SPI_SPIPC4_SCS0SET0 (0x00000001u)
  254. #define SPI_SPIPC4_SCS0SET0_SHIFT (0x00000000u)
  255. /* SPIPC5 */
  256. #define SPI_SPIPC5_SOMICLR (0x00000800u)
  257. #define SPI_SPIPC5_SOMICLR_SHIFT (0x0000000Bu)
  258. #define SPI_SPIPC5_SIMOCLR (0x00000400u)
  259. #define SPI_SPIPC5_SIMOCLR_SHIFT (0x0000000Au)
  260. #define SPI_SPIPC5_CLKCLR (0x00000200u)
  261. #define SPI_SPIPC5_CLKCLR_SHIFT (0x00000009u)
  262. #define SPI_SPIPC5_ENACLR (0x00000100u)
  263. #define SPI_SPIPC5_ENACLR_SHIFT (0x00000008u)
  264. #define SPI_SPIPC5_SCS0CLR7 (0x00000080u)
  265. #define SPI_SPIPC5_SCS0CLR7_SHIFT (0x00000007u)
  266. #define SPI_SPIPC5_SCS0CLR6 (0x00000040u)
  267. #define SPI_SPIPC5_SCS0CLR6_SHIFT (0x00000006u)
  268. #define SPI_SPIPC5_SCS0CLR5 (0x00000020u)
  269. #define SPI_SPIPC5_SCS0CLR5_SHIFT (0x00000005u)
  270. #define SPI_SPIPC5_SCS0CLR4 (0x00000010u)
  271. #define SPI_SPIPC5_SCS0CLR4_SHIFT (0x00000004u)
  272. #define SPI_SPIPC5_SCS0CLR3 (0x00000008u)
  273. #define SPI_SPIPC5_SCS0CLR3_SHIFT (0x00000003u)
  274. #define SPI_SPIPC5_SCS0CLR2 (0x00000004u)
  275. #define SPI_SPIPC5_SCS0CLR2_SHIFT (0x00000002u)
  276. #define SPI_SPIPC5_SCS0CLR1 (0x00000002u)
  277. #define SPI_SPIPC5_SCS0CLR1_SHIFT (0x00000001u)
  278. #define SPI_SPIPC5_SCS0CLR0 (0x00000001u)
  279. #define SPI_SPIPC5_SCS0CLR0_SHIFT (0x00000000u)
  280. /* SPIDAT0 */
  281. #define SPI_SPIDAT0_TXDATA (0x0000FFFFu)
  282. #define SPI_SPIDAT0_TXDATA_SHIFT (0x00000000u)
  283. /* SPIDAT1 */
  284. #define SPI_SPIDAT1_CSHOLD (0x10000000u)
  285. #define SPI_SPIDAT1_CSHOLD_SHIFT (0x0000001Cu)
  286. #define SPI_SPIDAT1_WDEL (0x04000000u)
  287. #define SPI_SPIDAT1_WDEL_SHIFT (0x0000001Au)
  288. #define SPI_SPIDAT1_DFSEL (0x03000000u)
  289. #define SPI_SPIDAT1_DFSEL_SHIFT (0x00000018u)
  290. /*----DFSEL Tokens----*/
  291. #define SPI_SPIDAT1_DFSEL_FORMAT0 (0x00000000u)
  292. #define SPI_SPIDAT1_DFSEL_FORMAT1 (0x00000001u)
  293. #define SPI_SPIDAT1_DFSEL_FORMAT2 (0x00000002u)
  294. #define SPI_SPIDAT1_DFSEL_FORMAT3 (0x00000003u)
  295. #define SPI_SPIDAT1_CSNR (0x00FF0000u)
  296. #define SPI_SPIDAT1_CSNR_SHIFT (0x00000010u)
  297. #define SPI_SPIDAT1_TXDATA (0x0000FFFFu)
  298. #define SPI_SPIDAT1_TXDATA_SHIFT (0x00000000u)
  299. /* SPIBUF */
  300. #define SPI_SPIBUF_RXEMPTY (0x80000000u)
  301. #define SPI_SPIBUF_RXEMPTY_SHIFT (0x0000001Fu)
  302. #define SPI_SPIBUF_RXOVR (0x40000000u)
  303. #define SPI_SPIBUF_RXOVR_SHIFT (0x0000001Eu)
  304. #define SPI_SPIBUF_TXFULL (0x20000000u)
  305. #define SPI_SPIBUF_TXFULL_SHIFT (0x0000001Du)
  306. #define SPI_SPIBUF_BITERR (0x10000000u)
  307. #define SPI_SPIBUF_BITERR_SHIFT (0x0000001Cu)
  308. #define SPI_SPIBUF_DESYNC (0x08000000u)
  309. #define SPI_SPIBUF_DESYNC_SHIFT (0x0000001Bu)
  310. #define SPI_SPIBUF_PARERR (0x04000000u)
  311. #define SPI_SPIBUF_PARERR_SHIFT (0x0000001Au)
  312. #define SPI_SPIBUF_TIMEOUT (0x02000000u)
  313. #define SPI_SPIBUF_TIMEOUT_SHIFT (0x00000019u)
  314. #define SPI_SPIBUF_DLENERR (0x01000000u)
  315. #define SPI_SPIBUF_DLENERR_SHIFT (0x00000018u)
  316. #define SPI_SPIBUF_RXDATA (0x0000FFFFu)
  317. #define SPI_SPIBUF_RXDATA_SHIFT (0x00000000u)
  318. /* SPIEMU */
  319. #define SPI_SPIEMU_RXDATA (0x0000FFFFu)
  320. #define SPI_SPIEMU_RXDATA_SHIFT (0x00000000u)
  321. /* SPIDELAY */
  322. #define SPI_SPIDELAY_C2TDELAY (0xFF000000u)
  323. #define SPI_SPIDELAY_C2TDELAY_SHIFT (0x00000018u)
  324. #define SPI_SPIDELAY_T2CDELAY (0x00FF0000u)
  325. #define SPI_SPIDELAY_T2CDELAY_SHIFT (0x00000010u)
  326. #define SPI_SPIDELAY_T2EDELAY (0x0000FF00u)
  327. #define SPI_SPIDELAY_T2EDELAY_SHIFT (0x00000008u)
  328. #define SPI_SPIDELAY_C2EDELAY (0x000000FFu)
  329. #define SPI_SPIDELAY_C2EDELAY_SHIFT (0x00000000u)
  330. /* SPIDEF */
  331. #define SPI_SPIDEF_CSDEF (0x0000000FFu)
  332. #define SPI_SPIDEF_CSDEFN(n) (1 << n)
  333. #define SPI_SPIDEF_CSDEF_SHIFT (0x00000000u)
  334. /* SPIFMT */
  335. #define SPI_SPIFMT_WDELAY (0x3F000000u)
  336. #define SPI_SPIFMT_WDELAY_SHIFT (0x00000018u)
  337. #define SPI_SPIFMT_PARPOL (0x00800000u)
  338. #define SPI_SPIFMT_PARPOL_SHIFT (0x00000017u)
  339. #define SPI_SPIFMT_PARENA (0x00400000u)
  340. #define SPI_SPIFMT_PARENA_SHIFT (0x00000016u)
  341. #define SPI_SPIFMT_WAITENA (0x00200000u)
  342. #define SPI_SPIFMT_WAITENA_SHIFT (0x00000015u)
  343. #define SPI_SPIFMT_SHIFTDIR (0x00100000u)
  344. #define SPI_SPIFMT_SHIFTDIR_SHIFT (0x00000014u)
  345. #define SPI_SPIFMT_DISCSTIMERS (0x00040000u)
  346. #define SPI_SPIFMT_DISCSTIMERS_SHIFT (0x00000012u)
  347. #define SPI_SPIFMT_POLARITY (0x00020000u)
  348. #define SPI_SPIFMT_POLARITY_SHIFT (0x00000011u)
  349. #define SPI_SPIFMT_PHASE (0x00010000u)
  350. #define SPI_SPIFMT_PHASE_SHIFT (0x00000010u)
  351. #define SPI_SPIFMT_PRESCALE (0x0000FF00u)
  352. #define SPI_SPIFMT_PRESCALE_SHIFT (0x00000008u)
  353. #define SPI_SPIFMT_CHARLEN (0x0000001Fu)
  354. #define SPI_SPIFMT_CHARLEN_SHIFT (0x00000000u)
  355. /* INTVEC */
  356. #define SPI_INTVEC_INTVECT (0x0000003Eu)
  357. #define SPI_INTVEC_INTVECT_SHIFT (0x00000001u)
  358. #ifdef __cplusplus
  359. }
  360. #endif
  361. #endif