phy.h 6.3 KB

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  1. /**
  2. * \file phy.h
  3. *
  4. * \brief Macros and function definitions for EMAC PHY
  5. */
  6. /*
  7. * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
  8. */
  9. /*
  10. * Redistribution and use in source and binary forms, with or without
  11. * modification, are permitted provided that the following conditions
  12. * are met:
  13. *
  14. * Redistributions of source code must retain the above copyright
  15. * notice, this list of conditions and the following disclaimer.
  16. *
  17. * Redistributions in binary form must reproduce the above copyright
  18. * notice, this list of conditions and the following disclaimer in the
  19. * documentation and/or other materials provided with the
  20. * distribution.
  21. *
  22. * Neither the name of Texas Instruments Incorporated nor the names of
  23. * its contributors may be used to endorse or promote products derived
  24. * from this software without specific prior written permission.
  25. *
  26. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  27. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  28. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  29. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  30. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  31. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  32. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  33. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  34. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  35. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  36. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  37. *
  38. */
  39. #ifndef _PHY_H_
  40. #define _PHY_H_
  41. #ifdef __cplusplus
  42. extern "C" {
  43. #endif
  44. /* PHY register offset definitions */
  45. #define PHY_BCR (0u)
  46. #define PHY_BSR (1u)
  47. #define PHY_ID1 (2u)
  48. #define PHY_ID2 (3u)
  49. #define PHY_AUTONEG_ADV (4u)
  50. #define PHY_LINK_PARTNER_ABLTY (5u)
  51. #define PHY_1000BT_CONTROL (9u)
  52. #define PHY_1000BT_STATUS (0x0A)
  53. /* PHY status definitions */
  54. #define PHY_ID_SHIFT (16u)
  55. #define PHY_SOFTRESET (0x8000)
  56. #define PHY_AUTONEG_ENABLE (0x1000u)
  57. #define PHY_AUTONEG_RESTART (0x0200u)
  58. #define PHY_AUTONEG_COMPLETE (0x0020u)
  59. #define PHY_AUTONEG_INCOMPLETE (0x0000u)
  60. #define PHY_AUTONEG_STATUS (0x0020u)
  61. #define PHY_AUTONEG_ABLE (0x0008u)
  62. #define PHY_LPBK_ENABLE (0x4000u)
  63. #define PHY_LINK_STATUS (0x0004u)
  64. /* PHY ID. The LSB nibble will vary between different phy revisions */
  65. #define PHY_ID_REV_MASK (0x0000000Fu)
  66. /* Pause operations */
  67. #define PHY_PAUSE_NIL (0x0000u)
  68. #define PHY_PAUSE_SYM (0x0400u)
  69. #define PHY_PAUSE_ASYM (0x0800u)
  70. #define PHY_PAUSE_BOTH_SYM_ASYM (0x0C00u)
  71. /* 1000 Base-T capabilities */
  72. #define PHY_NO_1000BT (0x0000u)
  73. #define PHY_1000BT_HD (0x0100u)
  74. #define PHY_1000BT_FD (0x0200u)
  75. /* 100 Base TX Full Duplex capablity */
  76. #define PHY_100BTX_HD (0x0000u)
  77. #define PHY_100BTX_FD (0x0100u)
  78. /* 100 Base TX capability */
  79. #define PHY_NO_100BTX (0x0000u)
  80. #define PHY_100BTX (0x0080u)
  81. /* 10 BaseT duplex capabilities */
  82. #define PHY_10BT_HD (0x0000u)
  83. #define PHY_10BT_FD (0x0040u)
  84. /* 10 BaseT ability*/
  85. #define PHY_NO_10BT (0x0000u)
  86. #define PHY_10BT (0x0020u)
  87. #define PHY_LINK_PARTNER_1000BT_FD (0x0800u)
  88. #define PHY_LINK_PARTNER_1000BT_HD (0x0400u)
  89. /* Speed settings for BCR register */
  90. #define PHY_SPEED_MASK (0xDFBF)
  91. #define PHY_SPEED_10MBPS (0x0000u)
  92. #define PHY_SPEED_100MBPS (0x2000u)
  93. #define PHY_SPEED_1000MBPS (0x0040)
  94. /* Duplex settings for BCR register */
  95. #define PHY_FULL_DUPLEX (0x0100)
  96. /**************************************************************************
  97. API function Prototypes
  98. **************************************************************************/
  99. extern unsigned int PhyIDGet(unsigned int mdioBaseAddr,
  100. unsigned int phyAddr);
  101. extern unsigned int PhyLoopBackEnable(unsigned int mdioBaseAddr,
  102. unsigned int phyAddr);
  103. extern unsigned int PhyLoopBackDisable(unsigned int mdioBaseAddr,
  104. unsigned int phyAddr);
  105. extern unsigned int PhyReset(unsigned int mdioBaseAddr, unsigned int phyAddr);
  106. extern unsigned int PhyConfigure(unsigned int mdioBaseAddr,
  107. unsigned int phyAddr,
  108. unsigned short speed,
  109. unsigned short duplexMode);
  110. extern unsigned int PhyAutoNegotiate(unsigned int mdioBaseAddr,
  111. unsigned int phyAddr,
  112. unsigned short *advPtr,
  113. unsigned short *gigAdvPtr);
  114. extern unsigned int PhyRegRead(unsigned int mdioBaseAddr,
  115. unsigned int phyAddr,
  116. unsigned int regIdx,
  117. unsigned short *regValAdr);
  118. extern void PhyRegWrite(unsigned int mdioBaseAddr,
  119. unsigned int phyAddr,
  120. unsigned int regIdx,
  121. unsigned short regVal);
  122. extern unsigned int PhyPartnerAbilityGet(unsigned int mdioBaseAddr,
  123. unsigned int phyAddr,
  124. unsigned short *ptnerAblty,
  125. unsigned short *gbpsPtnerAblty);
  126. extern unsigned int PhyLinkStatusGet(unsigned int mdioBaseAddr,
  127. unsigned int phyAddr,
  128. volatile unsigned int retries);
  129. extern unsigned int PhyAutoNegStatusGet(unsigned int mdioBaseAddr,
  130. unsigned int phyAddr);
  131. #ifdef __cplusplus
  132. }
  133. #endif
  134. #endif