hw_gpio_v2.h 8.7 KB

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  1. /**
  2. * @Component: GPIO
  3. *
  4. * @Filename: ../../CredDataBase/gpio_v2_cred.h
  5. *
  6. ============================================================================ */
  7. /*
  8. * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
  9. */
  10. /*
  11. * Redistribution and use in source and binary forms, with or without
  12. * modification, are permitted provided that the following conditions
  13. * are met:
  14. *
  15. * Redistributions of source code must retain the above copyright
  16. * notice, this list of conditions and the following disclaimer.
  17. *
  18. * Redistributions in binary form must reproduce the above copyright
  19. * notice, this list of conditions and the following disclaimer in the
  20. * documentation and/or other materials provided with the
  21. * distribution.
  22. *
  23. * Neither the name of Texas Instruments Incorporated nor the names of
  24. * its contributors may be used to endorse or promote products derived
  25. * from this software without specific prior written permission.
  26. *
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  30. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  31. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  32. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  33. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  34. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  35. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  36. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  37. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  38. *
  39. */
  40. #ifndef _HW_GPIO_H_
  41. #define _HW_GPIO_H_
  42. #ifdef __cplusplus
  43. extern "C" {
  44. #endif
  45. /***********************************************************************\
  46. * Register arrays Definition
  47. \***********************************************************************/
  48. /***********************************************************************\
  49. * Bundle arrays Definition
  50. \***********************************************************************/
  51. /***********************************************************************\
  52. * Bundles Definition
  53. \***********************************************************************/
  54. /*************************************************************************\
  55. * Registers Definition
  56. \*************************************************************************/
  57. #define GPIO_REVISION (0x0)
  58. #define GPIO_SYSCONFIG (0x10)
  59. #define GPIO_IRQSTATUS_RAW(n) (0x24 + (n * 4))
  60. #define GPIO_IRQSTATUS(n) (0x2C + (n * 4))
  61. #define GPIO_IRQSTATUS_SET(n) (0x34 + (n * 4))
  62. #define GPIO_IRQSTATUS_CLR(n) (0x3C + (n * 4))
  63. #define GPIO_IRQWAKEN(n) (0x44 + (n * 4))
  64. #define GPIO_SYSSTATUS (0x114)
  65. #define GPIO_CTRL (0x130)
  66. #define GPIO_OE (0x134)
  67. #define GPIO_DATAIN (0x138)
  68. #define GPIO_DATAOUT (0x13C)
  69. #define GPIO_LEVELDETECT(n) (0x140 + (n * 4))
  70. #define GPIO_RISINGDETECT (0x148)
  71. #define GPIO_FALLINGDETECT (0x14C)
  72. #define GPIO_DEBOUNCENABLE (0x150)
  73. #define GPIO_DEBOUNCINGTIME (0x154)
  74. #define GPIO_CLEARDATAOUT (0x190)
  75. #define GPIO_SETDATAOUT (0x194)
  76. /**************************************************************************\
  77. * Field Definition Macros
  78. \**************************************************************************/
  79. /* REVISION */
  80. #define GPIO_REVISION_CUSTOM (0x000000C0u)
  81. #define GPIO_REVISION_CUSTOM_SHIFT (0x00000006u)
  82. #define GPIO_REVISION_FUNC (0x0FFF0000u)
  83. #define GPIO_REVISION_FUNC_SHIFT (0x00000010u)
  84. #define GPIO_REVISION_MAJOR (0x00000700u)
  85. #define GPIO_REVISION_MAJOR_SHIFT (0x00000008u)
  86. #define GPIO_REVISION_MINOR (0x0000003Fu)
  87. #define GPIO_REVISION_MINOR_SHIFT (0x00000000u)
  88. #define GPIO_REVISION_RTL (0x0000F800u)
  89. #define GPIO_REVISION_RTL_SHIFT (0x0000000Bu)
  90. #define GPIO_REVISION_SCHEME (0xC0000000u)
  91. #define GPIO_REVISION_SCHEME_SHIFT (0x0000001Eu)
  92. /* SYSCONFIG */
  93. #define GPIO_SYSCONFIG_AUTOIDLE (0x00000001u)
  94. #define GPIO_SYSCONFIG_AUTOIDLE_SHIFT (0x00000000u)
  95. #define GPIO_SYSCONFIG_AUTOIDLE_AUTOMATIC (0x1u)
  96. #define GPIO_SYSCONFIG_AUTOIDLE_FREERUN (0x0u)
  97. #define GPIO_SYSCONFIG_ENAWAKEUP (0x00000004u)
  98. #define GPIO_SYSCONFIG_ENAWAKEUP_SHIFT (0x00000002u)
  99. #define GPIO_SYSCONFIG_ENAWAKEUP_DISABLE (0x0u)
  100. #define GPIO_SYSCONFIG_ENAWAKEUP_ENABLE (0x1u)
  101. #define GPIO_SYSCONFIG_IDLEMODE (0x00000018u)
  102. #define GPIO_SYSCONFIG_IDLEMODE_SHIFT (0x00000003u)
  103. #define GPIO_SYSCONFIG_IDLEMODE_FORCEIDLE (0x0u)
  104. #define GPIO_SYSCONFIG_IDLEMODE_NOIDLE (0x1u)
  105. #define GPIO_SYSCONFIG_IDLEMODE_SMARTIDLE (0x2u)
  106. #define GPIO_SYSCONFIG_IDLEMODE_SMARTIDLEWAKEUP (0x3u)
  107. #define GPIO_SYSCONFIG_SOFTRESET (0x00000002u)
  108. #define GPIO_SYSCONFIG_SOFTRESET_SHIFT (0x00000001u)
  109. #define GPIO_SYSCONFIG_SOFTRESET_NORMAL (0x0u)
  110. #define GPIO_SYSCONFIG_SOFTRESET_RESET (0x1u)
  111. /* IRQSTATUS_RAW_0 */
  112. #define GPIO_IRQSTATUS_RAW_0_INTLINE (0xFFFFFFFFu)
  113. #define GPIO_IRQSTATUS_RAW_0_INTLINE_SHIFT (0x00000000u)
  114. /* IRQSTATUS_RAW_1 */
  115. #define GPIO_IRQSTATUS_RAW_1_INTLINE (0xFFFFFFFFu)
  116. #define GPIO_IRQSTATUS_RAW_1_INTLINE_SHIFT (0x00000000u)
  117. /* IRQSTATUS_0 */
  118. #define GPIO_IRQSTATUS_0_INTLINE (0xFFFFFFFFu)
  119. #define GPIO_IRQSTATUS_0_INTLINE_SHIFT (0x00000000u)
  120. /* IRQSTATUS_1 */
  121. #define GPIO_IRQSTATUS_1_INTLINE (0xFFFFFFFFu)
  122. #define GPIO_IRQSTATUS_1_INTLINE_SHIFT (0x00000000u)
  123. /* IRQSTATUS_SET_0 */
  124. #define GPIO_IRQSTATUS_SET_0_INTLINE (0xFFFFFFFFu)
  125. #define GPIO_IRQSTATUS_SET_0_INTLINE_SHIFT (0x00000000u)
  126. /* IRQSTATUS_SET_1 */
  127. #define GPIO_IRQSTATUS_SET_1_INTLINE (0xFFFFFFFFu)
  128. #define GPIO_IRQSTATUS_SET_1_INTLINE_SHIFT (0x00000000u)
  129. /* IRQSTATUS_CLR_0 */
  130. #define GPIO_IRQSTATUS_CLR_0_INTLINE (0xFFFFFFFFu)
  131. #define GPIO_IRQSTATUS_CLR_0_INTLINE_SHIFT (0x00000000u)
  132. /* IRQSTATUS_CLR_1 */
  133. #define GPIO_IRQSTATUS_CLR_1_INTLINE (0xFFFFFFFFu)
  134. #define GPIO_IRQSTATUS_CLR_1_INTLINE_SHIFT (0x00000000u)
  135. /* SYSSTATUS */
  136. #define GPIO_SYSSTATUS_RESETDONE (0x00000001u)
  137. #define GPIO_SYSSTATUS_RESETDONE_SHIFT (0x00000000u)
  138. #define GPIO_SYSSTATUS_RESETDONE_COMPLETE (0x1u)
  139. #define GPIO_SYSSTATUS_RESETDONE_ONGOING (0x0u)
  140. /* CTRL */
  141. #define GPIO_CTRL_DISABLEMODULE (0x00000001u)
  142. #define GPIO_CTRL_DISABLEMODULE_SHIFT (0x00000000u)
  143. #define GPIO_CTRL_DISABLEMODULE_DISABLED (0x1u)
  144. #define GPIO_CTRL_DISABLEMODULE_ENABLED (0x0u)
  145. #define GPIO_CTRL_GATINGRATIO (0x00000006u)
  146. #define GPIO_CTRL_GATINGRATIO_SHIFT (0x00000001u)
  147. #define GPIO_CTRL_GATINGRATIO_N_1 (0x0u)
  148. #define GPIO_CTRL_GATINGRATIO_N_2 (0x1u)
  149. #define GPIO_CTRL_GATINGRATIO_N_4 (0x2u)
  150. #define GPIO_CTRL_GATINGRATIO_N_8 (0x3u)
  151. /* OE */
  152. #define GPIO_OE_OUTPUTEN (0xFFFFFFFFu)
  153. #define GPIO_OE_OUTPUTEN_SHIFT (0x00000000u)
  154. #define GPIO_OE_OUTPUTEN_DISABLED (0x1u)
  155. #define GPIO_OE_OUTPUTEN_ENABLED (0x0u)
  156. /* DATAIN */
  157. #define GPIO_DATAIN_DATAIN (0xFFFFFFFFu)
  158. #define GPIO_DATAIN_DATAIN_SHIFT (0x00000000u)
  159. /* DATAOUT */
  160. #define GPIO_DATAOUT_DATAOUT (0xFFFFFFFFu)
  161. #define GPIO_DATAOUT_DATAOUT_SHIFT (0x00000000u)
  162. /* LEVELDETECT0 */
  163. #define GPIO_LEVELDETECT0_LEVELDETECT0 (0xFFFFFFFFu)
  164. #define GPIO_LEVELDETECT0_LEVELDETECT0_SHIFT (0x00000000u)
  165. #define GPIO_LEVELDETECT0_LEVELDETECT0_DISABLED (0x0u)
  166. #define GPIO_LEVELDETECT0_LEVELDETECT0_ENABLED (0x1u)
  167. /* LEVELDETECT1 */
  168. #define GPIO_LEVELDETECT1_LEVELDETECT1 (0xFFFFFFFFu)
  169. #define GPIO_LEVELDETECT1_LEVELDETECT1_SHIFT (0x00000000u)
  170. #define GPIO_LEVELDETECT1_LEVELDETECT1_DISABLED (0x0u)
  171. #define GPIO_LEVELDETECT1_LEVELDETECT1_ENABLED (0x1u)
  172. /* RISINGDETECT */
  173. #define GPIO_RISINGDETECT_RISINGDETECT (0xFFFFFFFFu)
  174. #define GPIO_RISINGDETECT_RISINGDETECT_SHIFT (0x00000000u)
  175. #define GPIO_RISINGDETECT_RISINGDETECT_DISABLED (0x0u)
  176. #define GPIO_RISINGDETECT_RISINGDETECT_ENABLED (0x1u)
  177. /* FALLINGDETECT */
  178. #define GPIO_FALLINGDETECT_FALLINGDETECT (0xFFFFFFFFu)
  179. #define GPIO_FALLINGDETECT_FALLINGDETECT_SHIFT (0x00000000u)
  180. #define GPIO_FALLINGDETECT_FALLINGDETECT_DISABLED (0x0u)
  181. #define GPIO_FALLINGDETECT_FALLINGDETECT_ENABLED (0x1u)
  182. /* DEBOUNCENABLE */
  183. #define GPIO_DEBOUNCENABLE_DEBOUNCEENABLE (0xFFFFFFFFu)
  184. #define GPIO_DEBOUNCENABLE_DEBOUNCEENABLE_SHIFT (0x00000000u)
  185. #define GPIO_DEBOUNCENABLE_DEBOUNCEENABLE_DEBOUNCE (0x1u)
  186. #define GPIO_DEBOUNCENABLE_DEBOUNCEENABLE_NODEBOUNCE (0x0u)
  187. /* DEBOUNCINGTIME */
  188. #define GPIO_DEBOUNCINGTIME_DEBOUNCETIME (0x000000FFu)
  189. #define GPIO_DEBOUNCINGTIME_DEBOUNCETIME_SHIFT (0x00000000u)
  190. /* CLEARDATAOUT */
  191. #define GPIO_CLEARDATAOUT_INTLINE (0xFFFFFFFFu)
  192. #define GPIO_CLEARDATAOUT_INTLINE_SHIFT (0x00000000u)
  193. /* SETDATAOUT */
  194. #define GPIO_SETDATAOUT_INTLINE (0xFFFFFFFFu)
  195. #define GPIO_SETDATAOUT_INTLINE_SHIFT (0x00000000u)
  196. #ifdef __cplusplus
  197. }
  198. #endif
  199. #endif